Developing quantum computing hardware capable of efficiently solving complex problems is a key goal in quantum engineering. To approach this goal, Akhetonic’s quantum engineering team reached the consensus: Single photons might light the way, but a wave of many could cross the finish line. Building on this insight, Akhetonics, in collaboration with the Frauenhofer Institute for Reliability and Microintegration (IZM), has kicked off its new project “Scalable Packaging for All-Optical CV Quantum Computing (SPOC)”.
The project’s aim is to develop and design essential technologies for integrating, controlling and packaging room temperature photonic quantum circuits for continuous variable measurement-based quantum computing (CV-MBQC). As of now, Akhetonics has designed circuits with Gaussian gates that work on the principles of CV-MBQC. In these circuits, entangled squeezed states of light are teleported using a sequence of OPA measurements. The measurement result is processed by an all-optical feed forward, which, in contrast to electronic approaches, greatly benefits speed and scalability of the quantum circuit.
We are thrilled to collaborate with Frauenhofer IZM and Noisylabs—leaders in photonic chip packaging and quantum optics. Dr. Henning Schröder’s group at the IZM provides the expertise, equipment and implementation of the photonic-packaging for the quantum circuit components. Specifically, they design glass-based interposer boards to combine and miniaturize the system components, design optical interconnects (PWBs) for efficient coupling between circuit components, and characterize the final system to demonstrate the functionality of the technology.
On the first of July 2024 we hosted the first SPOC meeting at our office in Berlin. Together with Wojciech Lewoczko-Adamczyk and Christian Janeczka from IZM we discussed how to develop and manufacture the first ever sub-centimetre integrated all-optical quantum identity gate, followed by the development and manufacturing of a cubic phase gate that can be used for universal quantum computing at room temperature. The masterplan is to connect the integrated gates and build a quantum module for our XPU.
